구글 안티그래비티 완전 분석 — 모델·요금제·CLI 총정리

🚀 구글 안티그래비티(Antigravity) 완전 분석 구글이 2025년 11월 Gemini 3와 함께 공개한 에이전트 퍼스트(agent-first) IDE 안티그래비티는 Claude·GPT·Gemini를 한 도구에서 골라 쓰는 멀티모델 코딩 환경이다. 이 글에서는 ① 지원 모델과 요금제별 사용량의 실체, ② 실사용자 평가, ③ 구글의 방향성, ④ Claude Code와의 비교·연계, ⑤ CLI( agy )로 직접 쓰는 법까지 다섯 갈래를 차례로 정리한다. 자료 간 충돌이 있는 지점은 한쪽으로 단정하지 않고 양쪽을 모두 살려 표기했다. 📅 기준 시점: 2026년 6월 · 프리뷰 단계 정보로 수치는 변동 가능 1. 안티그래비티란 무엇인가 — 기초 정리 안티그래비티는 2025년 7월 구글이 24억 달러 규모 라이선스 계약 으로 영입한 전 Windsurf 팀이 설계를 주도했다. VSCode를 포크한 위에 자율 에이전트 오케스트레이션 계층을 얹은 구조다. 2026년 5월 Google I/O에서 발표된 안티그래비티 2.0 은 데스크탑 앱과 함께 공식 CLI agy 를 처음 공개하며 기존 Gemini CLI의 공식 후계자 자리를 확정했다. 핵심 정체성은 단순 코드 자동완성이 아니라 병렬 에이전트 오케스트레이션 이다. 여러 에이전트가 동시에 — 하나는 API, 하나는 테스트, 또 하나는 프론트엔드 — 작업을 나눠 진행하고, 각 에이전트는 계획·테스트 결과·스크린샷·영상을 담은 Artifact 를 남긴다. "사람이 한 줄씩 승인"하는 방식이 아니라 "에이전트들이 일을 마치고 사람이 사후 검수"하는 모델이다. flowchart TD A([사용자 작업 지시]) --> B[에이전트 A API 구현] A --> C[에이전트 B 테스트 작성] A --> D[에이전트 C UI 생성] B --> E[Artifact 계획·결과·영상] C --> E D --> E...

Understanding DMA: How ARM's DMA-330 Revolutionizes Data Transfer

DMA: The Unsung Hero of High-Speed Data Transfer

Ever wondered how your computer handles massive data transfers, like loading a game or streaming high-definition video, without slowing to a crawl? Much of that magic happens thanks to a clever piece of technology called Direct Memory Access (DMA). It's like having a dedicated courier service for your data, allowing it to move directly between devices and memory without constantly bothering the main brain – the CPU.

What Exactly is DMA?

At its heart, Direct Memory Access (DMA) is a feature that allows hardware subsystems – think your graphics card, network adapter, or storage controller – to read from and write to main system memory (RAM) directly, without needing the CPU to manage every single byte of data.

Traditionally, when a device needed to send or receive data, the CPU would be the intermediary. It would fetch data from the device, move it to memory, or fetch data from memory and send it to the device. This is like a manager having to personally carry every single document between departments. It works, but it's incredibly inefficient, especially when there are lots of documents!

The Core Function: Bypassing the CPU for Speed

DMA changes this paradigm by introducing a DMA Controller. This specialized hardware component acts as an independent manager for data transfers. Here’s the typical workflow:

  1. CPU Initiation: The CPU starts the process by telling the DMA controller what needs to happen. This includes specifying:
    • The memory address where the data will be read from or written to.
    • The number of data units (like bytes or words) to transfer.
    • The direction of the transfer (e.g., device to memory, memory to device, or even memory to memory).
  2. DMA Controller Takes Charge: Once initiated, the DMA controller requests control of the system bus – the communication highway of your computer.
  3. Bus Control: The CPU temporarily grants control of the bus to the DMA controller.
  4. Direct Transfer: The DMA controller then orchestrates the data transfer directly between the peripheral device and the system memory. The CPU is completely free to perform other tasks, such as running your applications or managing the operating system, during this entire process.
  5. Completion Notification: Once the entire block of data has been transferred, the DMA controller relinquishes bus control and signals the CPU (usually via an interrupt) that the job is done.

How DMA Controllers Operate: Modes of Transfer

DMA controllers can operate in different modes, impacting how they interact with the CPU and bus:

  • Burst Mode: The DMA controller secures the entire bus for a single, continuous data transfer of a large block. This is very efficient for large amounts of data but can cause the CPU to wait longer.
  • Cycle Stealing Mode: The DMA controller transfers one data unit at a time and then releases the bus back to the CPU before requesting it again for the next unit. This allows the CPU to do some work between transfers, making it suitable for devices that need to transfer data frequently but in smaller chunks.
  • Transparent Mode: The DMA controller only performs transfers when the CPU is not using the bus. This is the least intrusive to the CPU but can result in slower overall transfer speeds.

The Big Advantages: Why DMA is Essential

The benefits of using DMA are substantial and form the backbone of modern high-performance computing:

  • Reduced CPU Load: This is the primary advantage. By offloading repetitive data transfer tasks, DMA frees up the CPU to focus on complex computations and application logic, leading to a snappier and more responsive system.
  • Increased Data Transfer Speed: Direct transfers bypass the CPU's processing overhead, allowing data to move much faster between devices and memory.
  • Improved System Performance: With the CPU less burdened, overall system throughput and efficiency skyrocket, enabling smoother multitasking and faster application execution.
  • Lower Latency & Higher Throughput: Essential for real-time applications, high-speed networking, and multimedia processing, DMA ensures data gets where it needs to be quickly and efficiently.
  • Power Efficiency: By minimizing CPU activity for data movement, DMA can contribute to lower power consumption, which is vital for mobile and embedded devices.

System-Level Impact: More Than Just Speed

Beyond raw speed, DMA's influence is felt throughout the system:

  • Responsiveness: Applications feel more fluid because the CPU isn't bogged down handling data streams.
  • Concurrency: Complex tasks involving multiple I/O operations can run more smoothly.
  • Resource Management: While DMA controllers themselves consume some resources, they enable more efficient use of the CPU and bus.

Diving into the ARM DMA-330: A Powerful Controller

When we look at specific hardware implementations, the ARM CoreLink DMA-330 stands out as a sophisticated DMA controller designed for ARM-based System-on-Chips (SoCs). It's built to provide high-performance data movement in modern, complex embedded systems.

Here’s how the DMA-330 leverages and enhances general DMA principles:

  • High Configurability: The DMA-330 is extremely flexible. It can be configured with multiple DMA channels (up to 8), allowing several data transfer operations to happen concurrently, each managed independently.
  • Advanced Interface: It boasts an AXI (Advanced eXtensible Interface) master interface. AXI is a high-performance bus standard crucial for modern SoCs, allowing the DMA-330 to efficiently communicate with other high-bandwidth components like memory controllers and high-speed peripherals. It also uses APB (Advanced Peripheral Bus) slave interfaces for control and programming by the CPU.
  • Programmable Instructions: Unlike simpler DMA controllers that might rely on fixed linked-list items, the DMA-330 uses a small, flexible instruction set. This allows for more complex data movement patterns, including scatter-gather operations (transferring data from non-contiguous memory locations or to multiple destinations), which can be programmed efficiently to minimize memory footprint.
  • Security Features: Importantly, the DMA-330 integrates ARM TrustZone security. This means it can manage data transfers between secure and non-secure worlds within an SoC, crucial for applications requiring robust security, like secure boot or payment processing.
  • Efficiency Boost: By handling these complex transfers independently and efficiently through its multi-channel architecture and optimized instruction set, the DMA-330 significantly offloads the main processor. This leads to either higher overall system performance or reduced power consumption, depending on the system's design goals.
  • Interrupt Handling: It provides robust interrupt capabilities to notify the CPU upon completion of transfer tasks, allowing for timely system responses.

In essence, the ARM DMA-330 exemplifies how DMA controllers have evolved. They are not just simple data movers but intelligent, configurable, and secure co-processors that are indispensable for modern computing, enabling everything from high-speed networking to advanced graphics rendering and efficient embedded system operation.

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